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GE / IP FANUC Series 90/30 In Stock

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1747-L541

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Allen Bradley | SLC-500 | 1747-L541 | Image

Allen Bradley | SLC-500 | 1747-L541 | Image Allen Bradley | SLC-500 | 1747-L541 | Image

SKU 2177051  UPC 0799705792708

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The Allen-Bradley 1747-L541 is a SLC 500 5/04 Central Processor Unit (CPU) with 12K user memory.  This CPU features fast communication capabilities and a user-selectable key switch on the front panel to select Run, Remote, or Program modes. The 1747-L541 is compatible with the 1747-M13 memory module Series C OS401 or later, which supports up to 64K of user-memory backup. The CPU is equipped with high-speed performance, typically running at 0.90 ms/K. On-board communications for the CPU include DH+ and RS-232.  The features of the built-in DH+ channel include high-speed communication and messaging with SLC 500, PLC-2, PLC-5, and ControlLogix processors. The RS-232 channel supports DF1 communication, DH-485, Modbus RTU Master communication with Modbus RTU slave devices, and ASCII I/O for connection to other ASCII devices such as serial printers, weigh scales, and bar code readers. The 1747-L541 is capable of channel-to-channel passthru (DH+ to DF1 full-duplex, DF1 radio modem, DF1 half-duplex Master, or DH-485). The 1747-L541 also has Remote I/O passthru and DeviceNet passthru.


The 1747-L541 is capable of controlling a maximum of 4096 inputs and 4096 outputs. The backplane current at 5V is 1000mA and at 24V is 200 mA. In case of brief power loss, the 1747-L541 provides a program scan hold-up time of 20 ms - 3 seconds to prevent corruption of the system. Exact times depend on the power supply load. There are 30 chassis module slots in the CPU. Bit execution for the 1747-L541 is 0.37 microseconds. The minimum thermal dissipation is 4 Watts for the unit. The CPU is designed with a built-in real-time clock/calendar. It has a 1 ms Selectable Time Interrupt (STI) and a 0.5 ms Discrete Input Interrupt (DII). The 1747-L541 also includes advanced math features such as trigonometry functions, PID, floating point, and compute instruction.

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