GE / IP FANUC Series 90/30 In Stock
|Memory Capacity||1 MB|
|Memory Type||CMOS RAM|
|Temperature||0 to 50 degrees Celsius|
The IC697CGR935 module is a one slot controller in the GE Fanuc series, which permits fluctuating point calculations mandatory for CPU redundancy applications. The IC697CGR935 module in the Redundancy System is used as the controller. There are two control methods to note when using the IC697CGR935. In the GHS process, several single bus networks with one redundant controller are used in each synchronized PLC. When using the GDB process, multiple I/O networks are used with single or double buses in each synchronized PLC. Each control method can be easily activated and used without difficulty. In the IC697CGR935 module, the memory board delivers data, and program memory is included with the module. The IC697CGR935 can be operated remotely or by the three position RUN/STOP switch. Positioned on the front of the module are the LEDs, which specify the status of the CPU.
Installation of the IC97CGR935 module should not be attempted without referring to the appropriate Programmable Controller Installation and Hot Standby CPU Redundancy Manual. The battery should be connected to one of the module’s battery connectors. The key switch should be positioned to MEMORY PROTECT OFF, and there should be no rack power. Once module is installed in slot 1 of rack 0, power is turned on. The top LED should blink indicating that the IC697CGR935 module is powered up. Once the diagnostic is finished effectively, the top left LED stays on while the second and third LED will be off. The MEMORY PROTECT LED which is the fourth LED, is off because the key switch is in off position. Programming is now ready for the CPU. The CPU can be programmed regardless of the placement of the key. Once the program has been confirmed, the toggle switch can be positioned in the appropriate operational mode.
|Module Type:||Single Slot CPU|
|Operating Temperature:||0 to 60 deg C (32 to 140 deg F)|
|Battery Shelf Life:||5 years at 20 deg C (68 deg F)|
|Inputs and Outputs:||12K each (any mix)|
|Current Required:||3.1 Amps nominal|
5 years at 20o C (68o F)
6 months nominal without applied power.
Current required from 5V bus
3.1 Amps nominal
0 to 60oC (32oF to 140oF); 70 CFM forced air required
0 to 50oC (32oF to 122oF); without forced air
Time of Day Clock accuracy
Elapsed Time Clock (internal timing) accuracy
" 3.5 seconds per day maximum
" .01% maximum
Port 1: RS-232 compatible
Port 2: RS-485 compatible (optocoupler isolated) Port 3: RS-485 compatible (not isolated)
Programmer Serial Attachment, or other serial devices.
Protocols supported: SNP Slave only
t Refer to GFK-0867B, or later for product standards and general specifications. For installations requiring compliance to more stringent requirements (for example, FCC or European Union Directives), refer to InstallationRequirements for Conformance to Standards.
Repair your IC697CGR935
Redundant CPU Genius Dual Bus (GDB) Operation
An anomaly may occur when trying to simulate a MANUAL,forced switch from the Primary to the Secondary CPU in the IC697CGR935 andIC697CGR772 based Redundant systems, configured for Genius Dual Bus mode (GDB) with or without a dual bus. If the %Q Output Shared Data is not properly set in the CPU configuration, it may seem that the Primary CPU is not relinquishing control of the outputs.
Normally, the Primary's outputs will exercise control because the Genius devices "listen" to Genius Bus Controller (GBC) #31 when they are configured for Hot Standby operation. If the %Q Shared Data is properly configured, the output states will be sent to the backup CPU across the RCM/BTM link, insuring redundancy. A failure in the primary CPU will disable the outputs on its bus controller causing the Genius devices on the bus to "listen" to the outputs from GBC #30.
If a manual switch to the Secondary CPU is commanded, the output data now flows from the Secondary CPU to the Primary CPU across the RCM/BTM link. A redundant system configured for GDB mode leaves the outputs enabled on both the Primary and Secondary GBCs as long as the processors are in the RUN mode. What is actually occurring is that the Secondary CPU "controls" by sending its outputs back to the Primary CPU, where GBC #31 sends them out. If the %Q Shared data is not properly configured (or missing altogether), the Primary CPU receives no data from the Secondary CPU and the Primary CPU uses data from its own %Q output table.
Note: When manually forcing a "role-reversal" like this on a system operating in Genius Hot Standby (GHS), the system will indeed force a DISABLE on the Primary CPU GBC outputs, causing a control switch to the Secondary, which is a bit different than GDB operation. It is also not guaranteed to be "bumpless"during the switchover from Secondary CPU back to the Primary CPU.
For more information on the IC697CGR935 96 MHz, 32-Bit, Floating Point Central Processing Unit of the GE Fanuc 90-70 Series, please see the Datasheet User-Manual.
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